SK Hynix And SanDisk Unleash High-Bandwidth Flash To Fix AI Bottlenecks
SK hynix and SanDisk, at the Future of Memory and Storage 2026 conference, released the first open technical specification for High-Bandwidth Flash (HBF) via the Open Compute Project. The spec, developed with partners including Google DeepMind and Tenstorrent, targets AI bottlenecks by using near-memory 3D/4D NAND with a UCIe interface. It defines Grade 1-3 bandwidth tiers of about 400GB/s to 3TB/s.
How this was made
The 30-second read
Why it matters
It describes HBF as near-memory NAND using 3D/4D stacked die and requiring UCIe for die-to-die host interface, with three bandwidth grades and claimed power-efficiency improvements.
Market read
Traders get a technology roadmap signal for AI memory architecture, but the article does not provide financial or adoption milestones.
What to watch
The article omits any confirmed OEM/accelerator customer design wins, qualification timelines, and unit economics, which are critical for translating specs into earnings.
Background
The piece argues that frontier AI models outgrow practical HBM capacity on accelerator packages, motivating an intermediate near-memory flash tier between HBM and PCIe SSDs.
Ticker impact
SK hynix is named as releasing the first open High-Bandwidth Flash specification via OCP to address AI memory bottlenecks.
Near-term: limited, mostly narrative-driven. Medium-term: potential upside if HBF adoption translates into incremental 4D NAND demand.
No commercial terms, customer commitments, or adoption timeline are provided; it is a technical specification release at a conference.
SanDisk is cited as co-releasing the first open HBF technical specification through OCP aimed at reducing AI infrastructure bottlenecks.
Near-term: low conviction. Medium-term: upside only if the spec leads to real deployments and volume commitments.
The piece provides performance tiers and NAND stack details but lacks revenue impact, contracts, or confirmed productization dates.
Market effects
Highlights a potential shift from pure HBM capacity constraints toward hybrid near-memory flash architectures for AI inference and MoE offloading.
Primarily relevant to enterprise AI hardware supply chains tied to US-based standards bodies and conference ecosystem.
Could influence global memory and chiplet interconnect roadmaps if UCIe-based HBF becomes an adopted reference design.
Counterpoint
A published open specification does not guarantee adoption; costs and packaging complexity may keep HBF confined to niche enterprise accelerators.
Key entities
- companySK hynix
Co-released the first open High-Bandwidth Flash technical specification via OCP and is referenced for 4D NAND (V10, 375-layer).
- companySanDisk
Co-released the first open HBF technical specification via OCP aimed at AI bottleneck mitigation.
- standards_bodyOpen Compute Project (OCP)
Platform through which the first open HBF technical specification is released.
- interconnect_standardUCIe
Mandated physical and protocol-level host interface for HBF die stacks.
