Synopsys validates a PCIe 6.0 PHY inside a face-to-face 3D stack at 64 GT/s — says it got there by pulling apart an existing 2D test chip
Synopsys announced a 3D PCIe 6.0 test chip with 64 GT/s per lane and 128 GB/s bandwidth, using PAM4 signaling. The company adapted an existing 2D chip, adding through-silicon vias and redesigning circuits for 3D stacking. Challenges include routing signals and managing errors, with future shifts to 3.5D packaging and UCIe expected.
How this was made

The 30-second read
Why it matters
The result validates 3D integration for next‑gen high‑speed interfaces, positioning Synopsys as a key enabler for future data‑center and AI accelerators.
Market read
Technical breakthrough may drive incremental demand for Synopsys' design tools, but commercial impact will be gradual.
What to watch
Potential competition from alternative interconnect standards (e.g., CXL) and the need for ecosystem support could temper impact.
Background
Synopsys, a leading EDA software provider, announced its first 3D PCIe 6.0 PHY test chip, demonstrating 64 GT/s per lane performance in a stacked package.
Ticker impact
Synopsys released silicon results for the first 3D PCIe 6.0 PHY test chip, a 5nm face‑to‑face stacked package running 64 GT/s per lane.
Modest upside for SNPS as customers evaluate 3D‑PCIe solutions; no immediate large move expected.
Technical breakthrough is novel but still early‑stage; market impact will unfold over months as designs adopt the technology.
Market effects
Highlights growing importance of 3D packaging in the semiconductor equipment sector, may benefit broader EDA and packaging players.
Primarily U.S. and Asian semiconductor design hubs; limited immediate regional effect.
Shows industry‑wide trend toward higher‑bandwidth interconnects, relevant to global chip manufacturers.
Counterpoint
The technology may face yield and cost challenges that delay commercial adoption, limiting near‑term upside for SNPS.
Key entities
- CompanySynopsys
US‑listed EDA tool provider (ticker SNPS).
- ExecutiveManmeet Walia
Executive Director of Product Management at Synopsys, quoted on technical challenges.

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